VLSI Design & Verification Based Project

Eligibility: B.E / B.Tech (ECE, EEE, IT, IS, CSE)
Duration: 15 days to 30 days

Contact for Project

VLSI Design & Verification Modules

Design & Implementation of projects on PLD device (FPGA-CLD) with the help of HDL programing language

  • Cryptography
  • Signal Processing
  • Wireless Communication (Base band Processing)
  • Image Processing & Image Compression
  • Interfaces ( RS232, I2C, SPI )
  • VLSI Implementation of a Processor

Application Areas

Wireless Communications Standards - Zigbee, WLAN, Wimax, LTE, Security Systems, Power Electronics, Medical Electronics

Projects Take Away

  • Gain strong subject knowledge and their applications
  • Exposure to have hands-on industry standard tools
  • Ability to present solution for real time complex problem
  • Project learning, Implementation & documentation
  • Hardware* for demonstration
  • Certification which has industry recognition.

*Terms & conditions apply