Post Graduate Diploma in VLSI Design & Verification

We Deliver both Classroom & Online Sessions

Eligibility: BE, B.Tech, ME, M.Tech
Duration: 5 Months

Enroll Now

VLSI Design ensures that a fresher is prepared on the entire essential aspects of VLSI front end domain including training on VLSI flow, SOC design and verification concepts, digital design, Verilog, Systemverilog. . The VSLI design course content is well structured and mapped with leading industry requirements and their standards.


Lack of fundamentals in Advanced Digital Design, Analog Design and Verilog based design and verification becomes a major deterrent for fresher in finding right career opportunities. VLSI design course ensures that fresher is empowered with all the essential skill set required for various jobs in VLSI front end domain. The course is completely practical oriented with each aspect of course involving multiple hands on projects.

VLSI Design

Part 1: Core VLSI Design and Implementation

  • Foundation to Basic Electronics concepts
  • Programming In C
  • Linux Commands and Shell scripting
  • Introduction to VLSI
  • Basic Verilog and Advanced Verilog
  • FPGA Programming

Part 2: VLSI Verification

  • FPGA Design Basic and Advanced
  • System Verilog
  • UVM(Universal Verification Method)
  • OVM Methodology
  • project  with lattice board - UART / 12C / SPI


  • Lattice Diamond Tool
  • Lattice Eval Boards

Basic and Advanced Digital Electronics - 5 Days

  • Naumber Systems, Logic Gates, Boolean Expressions, Combinational Circuits
  • Understanding Combinational Logic/Circuit Designing Canonical forms - SOP,POS
  • Introduction to Registers and Counters,Synchronous Finite State Machine Design,Data-path elements - Arithmetic Structures
  • Understanding Sequential Logic/Circuit Designing Digital Design Flow Modeling
  • Introduction to Programmable Platforms, Design Capture and Simulation, Practical Digital System Design Examples
  • Language Specification VHDL/Verilog digital model example Computer Architecture – RISC,CISC

Introduction to VLSI - 5 Days

  • Need, Scope, Use and History of VLSI
  • Introduction to Chip Design Process
  • Digital Design
  • Description of Hardware Description Languages
  • Evolution of Computer Aided
  • Applications of VLSI
  • Emergence of HDL’s
  • VLSI Design Flow
  • Importance of HDL’s

Verilog HDL - 20 Days

Introduction to VLSI

  • Need, Scope, Use and History of VLSI
  • Introduction to Chip Design Process
  • Description of Hardware Description Languages
  • Applications of VLSI
  • Evolution of Computer Aided Digital Design
  • Emergence of HDL’s
  • VLSI Design Flow
  • Importance of HDL’s

Introduction to Verilog HDL

  • Need, Scope, Use and History of Verilog HDL
  • Special Features of Verilog HDL
  • Application of Verilog HDL in Market and Industries
  • Discussion of Verilog HDL & other procedural language

Designing in Verilog HDL

  • Design Methodology
  • Top-Down Methodology
  • Bottom-up Methodology
  • Design Simulation and Design Synthesis
  • Verilog HDL Design Flow
  • Keyword description in VERILOG HDL
  • Module Description

Data Types in Verilog HDL

  • Lexical Conventions
  • Description of Data types: Net, Register
  • Scalar Data Description
  • Vector Data Description
  • Parameters Description
  • Array Description

GATE Level Modeling

  • Logic Gate Primitive
  • Gate Instantiation
  • Design RTL from Logic Diagram
  • Delays in Gate-Level Design

Dataflow Modeling

  • Continuous Assignment statement
  • Implicit Assignment statement
  • Delay: Assignment Delay, Implicit Assignment Delay, Net declaration Delay
  • Expressions
  • Operators & Operands
  • Operator Precedence

Behavioral Modeling

  • Structured Procedural Statements
  • Blocking Statement
  • Non blocking Statement
  • Timing Control Statement
  • Conditional statements
  • Loops

Finite State Machine

  • Introduction to FSM
  • Mealey Machine
  • Moore Machine
  • Flip-flops
  • Counters

Minor Projects

  • TLC by Sensors
  • TLC four way based on timing control
  • ALU Design
  • Shift unit Design  


  • Gate level Modeling
  • Dataflow modeling
  • BehavioralModeling
  • Switch level Modeling


  • Introduction to FPGA
  • Introduction to CPLD
  • Brief discussion of Hardware kit
  • Working on Physical FPGA and CPLD
  • 7-segment interfacing


  • Procedural Continuous Assignment
  • Statement
  • Assign Statement
  • Deassign Statement
  • Force Statement
  • Release Statement
  • Defparam Statement
  • Switch level Modeling style
  • MOS Switches
  • Bidirectional Pass Switches
  • Resistive MOS Switches
  • Introduction to system Verilog
  • Task and function
  • User Defined Primitives (UDP’s)
  • Combinational UDP’S
  • Sequential UDP’S
  • Verilog Test bench
  • Begin-end & fork –join
  • Logic synthesis
  • System Task
  • Compiler Directives


  • RAM & ROM designing
  • Bi - directional ports
  • Case X and Case Z statements
  • Major Projects

FPGA Design Basic and advanced - 20 Days

  • Introduction to FPGA
  • FPGA basic Architecture
  • FPGA Architecture
  • FPGA Internal resource
  • FPGA Design Essentials
  • FPGA Architecture Overview
  • FPGA Input/output Blocks (IOBs)
  • Special FPGA functions
  • Logic Synthesis
  • FPGA Programming with Verilog basics, Tool Training
  • Different Voltage Requirement’s for FPGA
  • Different External memory devices architecture
  • IO Planning
  • Report analysis for Timing, Area and Power
  • FPGA & SOC Overview

Introduction to FPGA (Architecture)

  • CPLD,FPGA, FPGA working, References, Design flow, Design tricks
  • H/W components on FPGA board and their working
  • Tool installation and working
  • Designing basic FPGA examples (Adder, Subtractor, Counter etc.)
  • Designing advanced FPGA
  • Examples (KeyBoard Interfacing,VGA,
  • Monitor interfacing, UART, SPI, I2C)
  • burn these modelson available FPGAkit

System Verilog – 20 days

  • Introduction aboutVerification
  • Introduction to SystemVerilog
  • Programming Language Features
  • BusFunctional Modeling, Basic Data Types, Interfaces
  • RTL Process, RTL Types
  • SystemVerilog Assertions, Properties, Assertions and Sequences
  • Clocking Blocks, Randomization, Coverage,
  • Arrays and Queues,
  • The Direct Programming Interface
  • Classes for Transactions, Class Members and Copying,
  • Virtual Interfaces, Extending Classes for Stimulus TLM and Channels,
  • Component Hierarchy, Monitors and Checkers
  • Functional Coverage, Processes and Events
  • Data Types &Operators
  • ProceduralStatements
  • Tasks &functions
  • Hierarchy & Connectivity
  • Various Interfaces
  • Object Oriented Paradigm(OOPS)
  • Program & Clocking Block
  • Inter Process Communication (IPC)
  • events,semaphores, mailboxes
  • Randomization
  • Class based randomization,Constraints
  • System Verilog Assertions
  • properties &sequences, assert,
  • assume, coverdirectives
  • Functional Coverage
  • TLM (Transaction Level Modeling) &UVM

UVM(Universal Verification Method) - 15 Days

  • Introduction UVM: why UVM
  • Data Introduction UVM: why UVM
  • UVM Object: Base class UVM object-Copy/Clone types -2satete
  • UVM object-Copy/Clone types -2satete
  • UVM test Bench
  • Analysis, Fifo
  • UVM socket concept
  • working on digital circuit

OVM Methodology - 20 Days

  • Introduction OVM
  • OVM Reporting
  • OVM Transaction
  • OVM Sequence 1: Introduction
  • Example, sequencer, divider
  • OVM Sequence 2: Sequence action macro
  • list of sequence action macros
  • OVM Configuration

Projects with Lattice boards on UART / I2C/ SPI

VLSI Project Synopsis

  • Design and implementation of protocols such as UART, SPI, I2C on Lattice FPGA Board
  • Design and implementation of VGA on Lattice FPGA Board

I take this opportunity to thank "CRANES VARSITY" one of the best embedded training institute which is helping students to get in best company to build their career. I thank all the trainers who enhanced my knowledge in every subject, I thank placement team for giving me best opportunities in the field of embedded. Thank you for all your support.

Chandru V
Placed in Avin Systems

First of all I would like to extend my thanks to each and every member of Cranes Varsity. We were taught from the very basics of Embedded Systems Design which made it easier for students from all the levels. I would like to extend my thanks for providing numerous opportunities which helped a lot, as the experience from those interviews created a curiosity to learn more, work even harder and taught me to keep on improving myself.

Ankita Saigal
Placed in Moschip Semiconductor

Cranes varsity is the best platform to improve your technical skills on Embedded System Design. Their dedication towards teaching modules and interaction with the students is good which made me to achieve good skills for my career growth in electronics / semiconductor industry.

Nithin G
Placed in Moschip Semiconductor

Cranes is one of the top embedded training institutes in Bangalore. It has been wonderful learning experience in Cranes Varsity. The training in every module of embedded systems at Cranes was effective. It provides good platform on embedded system. As a fresher it is very difficult to get opportunities but Cranes helped me to get the job in embedded industry.

Santhosh SM
Placed in L&T Technology

Cranes varsity is the best Embedded Training Institute to learn practical as well as theoretical knowledge and it is a best place to gear up your career in a core embedded industry. Management and faculty member supports till you get placed. They provided lots of opportunities to me. Embedded Course modules that we learnt here is systematic and I immensely earned great knowledge.

Hemanth Kumar
Placed in Caravel Info Systems

Happy to say that I am placed in Lekha Wireless. Cranes is one of best Embedded Training Institute. The way of teaching in Cranes is good. I thank the management and faculty for the guidance and opportunity.

Amitha Pankaj
Placed in Lekha Wireless

It was a great experience in Cranes. My dream was to get into embedded domain. As a fresher it is difficult to get into Embedded Design field, but Cranes made a huge difference in my career by giving best training and placement assistance provided by Cranes. I would like to say Cranes is best to choose for those who dream of embedded opportunity.

Mayur MN
Placed in L&T Technology

I am happy Cranes for giving a platform and providing opportunities for attending interview. Modules test ,Mock test really helps to clear any company written test/ interview. Trainers were excellent in explaining and clarifying the doubts. I am very thankful to Cranes Varsity.

Ankit Ahalawat
Placed in AK Aerotek Software

If not Cranes, I would have been doing a job of not my interest and passion. Cranes provided me the platform to give a better start to my career and knowledge about corporate life and requirements. "Thank you Cranes" would be an understatement.

Sidharth S
Placed in L&T Technology

Recent Placements

  • Tech Mahindra
  • Lattice Semiconductor
  • Autoliv India
  • Robert Bosch
  • QUEST Global
  • HCL Technologies
  • Path Partner
  • Wafer Space
  • L&T Technologies
  • Altran
  • Cyient
  • Sasken

Embedded Systems Design Training Calendar

Program Name Start Date Duration
ITAP- Post Graduate Diploma in VLSI Design & Verification November - 22nd 5 months

Cranes Varsity has answered most common doubts for which students are looking for like VLSI Design & Embedded Systems, Opportunities in VLSI Design & Embedded Systems, Placement support at Cranes Campus, list of companies looking for VLSI Design & Embedded Systems Developers, Training Certification and more. For further doubts / queries drop an email at This email address is being protected from spambots. You need JavaScript enabled to view it. or submit a form which is in home page. Your inquiries guide us to address the students' requirements better.

How VLSI Training at Cranes is different from other training institutes?

  • Industry focused training at affordable fee
  • Trainers with 10+ yrs of exp
  • Only Institute to offer training in all aspects of VLSI Design flow

Is there any placement assistance?

Institute has tie up with select VLSI companies. Student will get opportunity to attend these companies’ interviews. 100% placement assistance based on performance in course assignments and monthly test.

What if I miss few sessions of course?

Student also has option to look up for backup classes. This is only for classroom students.

Does the center provide any certification after completion of VLSI training?

Yes. All the participants will receive VLSI Training completion certificate from Cranes International, with their grades based on their performance during the VLSI training.

I have completed my B.Tech/M.Tech, few years back, I am not in any job, and can I still try for VLSI job?

Yes. It is possible to get job in VLSI even with few years gap after graduation. You need a right guidance.

I am working in non-VLSI domain for last 2 years, can I look for job in VLSI?

Yes. 2 Years is short span, so with right set of projects and right skill set, you will find opportunities in VLSI.

Can I complete VLSI training in 1.5 months?

Yes, you can complete. However your preparation may not be up to mark.

I am coming to Bangalore for training, should I stay close by institute?

Yes. It is strongly recommended to stay close by institute. There are many Paying guests (PGs) available nearby institute (within 1KM).

What is Regular Batch Size at Cranes?

The batch size is limited to 25 in order to ensure a closer student-faculty interaction and to also to have enough hands on session.

What is Training Timings?

Classes will be from Monday - Friday, 4 hours per day and other free time student can practice in LAB. However we keep the facility open for half a day on Saturday (9.00 AM to 1.00 PM)

  • Morning batch: 9:00 AM to 1:00 PM
  • Afternoon batch: 2.00 PM to 6.00 PM

Do you offer weekend classes?

Yes cranes offer weekend classes as well evening classes.

Does institute offers any discount on fee?

All courses are already offered at a lowest possible fee. Discount is offered to students from BPL economic status.

Which tools do you use for training?

Tools from Xilinx ISE, Vivado, We are the only training institute to have licenses from Xilinx.

Can I enroll in one or two modules, rather than a full program?


What test is needed for admission?

There is a general written test multiple choice which includes (basic engg., Aptitude and C programming)

What is the fees and duration of the VLSI Design & Embedded Systems course?

Duration of PGD / ITAP program is 5 months and training Fees is INR 67,000/- Payable in 3 installments.

Are there course materials for VLSI Design & Embedded Systems Training?

Yes, we provide course material along with work book for each module.

Do you offer any certificates after completion of Embedded Systems Design course?

Yes, we provide Post Graduate Diploma certificate with a grading system based on student performance